Conductance-Voltage Properties of Silicon Quantum Dot Metal-Insulator-Semiconductor Devices Fabricated by Sputtering
Double-barrier structures consisting of a layer of Silicon (Si) quantum dots (QDs) embedded within a Silicon Dioxide (SiO2) matrix are candidates for energy-selective contacts, which are necessary for realisation of the Hot Carrier solar cell concept. SiO2/Si:QD/SiO2 double barrier structures have been grown on crystalline Si (c-Si) substrates by reactive radio frequency (RF) magnetron sputtering. Subsequent deposition of top Aluminium (Al) electrodes resulted in formation of metal-insulator-semiconductor (MIS) devices, with the insulating layer of an individual device consisting of a SiO2/Si:QD/SiO2double-barrier structure (Si:QD-MIS devices). In order to characterise the role played by QDs in carrier transport conductance-voltage (G-V) measurements were performed on the Si:QD-MIS devices, as well as reference MIS devices devoid of QDs. Frequency-dependent conductance peaks were observed in both the Si:QD-MIS devices and the reference MIS devices. The conductance peaks are attributable to (i) the conductance of interface states at the interface of the SiO2 layer and the Si substrate, and (ii) a small signal inversion layer response in the transition region between tunnel-limited and semiconductor-limited device current. Observed conductance peak dependence on the bias voltage sweep direction indicates coupling to an inversion layer external to the top Al electrodes.